CMOS Logic Based Digital Clock (v2.1)
Discrete logic gate timekeeping combined with ESP12F NTP synchronization.
Project Overview
Unlike modern clocks driven entirely by microcontrollers, this digital clock keeps track of time using a high-frequency crystal oscillator divided down through CMOS counter chips and logic gates.
Revision 2.1 introduces a hybrid architecture: while fundamental timekeeping and display driving remain strictly in hardware logic, an onboard ESP12F microcontroller provides wireless NTP time sync and custom addressable RGB LED effects via MQTT.
The hardware-first approach reduces software complexity for timekeeping and illustrates robust design using discrete building blocks. The project also explores human-centred LED visualisations and low-latency hardware interrupts to drive display refresh without microcontroller intervention.
Blue PCB Variant Render
Top Layer Routing Details